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  AON7230 general description product summary v ds i d (at v gs =10v) 47a r ds(on) (at v gs =10v) < 11.5m? r ds(on) (at v gs =4.5v) < 15.5m? applications 100% uis tested 100% rg tested ? synchronous rectification in dc/dc and ac/dc c onverters ? synchronous rectification in cell phone quick charger absolute maximum ratings t a =25c unless otherwise noted AON7230 dfn 3.3x3.3 tape & reel 3000 100v n-channel mosfet orderable part number package type form minimum order q uantity 100v ? trench power mv mosfet technology ? low r ds(on) ? low gate charge ? logic level driven g ds top view 12 3 4 8 76 5 dfn 3.3x3.3 top view bottom view pin 1 pin 1 symbol v ds v gs i dm i as avalanche energy l=0.1mh c e as v ds spike v spike t j , t stg symbol t 10s steady-state steady-state r q jc power dissipation b 21 t c =100c 10s p d 100 120 54 gate-source voltage pulsed drain current c 30 parameter drain-source voltage continuous drain current maximum junction-to-case c/w c/w maximum junction-to-ambient a d 1.8 60 2.3 va absolute maximum ratings t a =25c unless otherwise noted 20 v maximum units w i d v a 33 a 125 i dsm 10 mj 54 13 47 maximum junction-to-ambient a c/w r q ja 25 50 30 thermal characteristics parameter max t a =70c 2.6 c units junction and storage temperature range -55 to 150 typ p dsm w t a =25c 4.1 power dissipation a t a =25c t a =70c t c =25c t c =100c t c =25c avalanche current c continuous drain current rev.1.0: october 2015 www.aosmd.com page 1 of 6
AON7230 symbol min typ max units bv dss 100 v v ds =100v, v gs =0v 1 t j =55c 5 i gss 100 na v gs(th) gate threshold voltage 1.5 1.95 2.5 v 9.5 11.5 t j =125c 18 22 12 15.5 m? g fs 55 s v sd 0.7 1 v i s 47 a c iss 2320 pf c oss 175 pf c rss 11 pf r g 0.7 1.4 2.1 ? q g (10v) 30 45 nc q g (4.5v) 13 21 nc q gs 7 nc q gd 3 nc t d(on) 8 ns t r 4 ns t d(off) 27 ns t f 5 ns reverse transfer capacitance v gs =0v, v ds =50v, f=1mhz v ds =v gs, i d =250 m a output capacitance forward transconductance i s =1a, v gs =0v v ds =5v, i d =13a v gs =10v, i d =13a v ds =0v, v gs =20v maximum body-diode continuous current input capacitance gate-body leakage current turn-off delaytime turn-off fall time v gs =10v, v ds =50v, r l =3.85 w , r gen =3 w diode forward voltage dynamic parameters v gs =4.5v, i d =11a turn-on rise time gate source charge gate drain charge total gate charge switching parameters turn-on delaytime m? v gs =10v, v ds =50v, i d =13a total gate charge electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions gate resistance f=1mhz i dss a zero gate voltage drain current drain-source breakdown voltage i d =250 m a, v gs =0v r ds(on) static drain-source on-resistance t f 5 ns t rr 25 ns q rr 120 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge body diode reverse recovery time i f =13a, di/dt=500a/ m s turn-off fall time i f =13a, di/dt=500a/ m s a. the value of r q ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. the power dissipation p dsm is based on r q ja t 10s and the maximum allowed junction temperature of 150 c. the value in any given application depends on the user's specific board design. b. the power dissipation p d is based on t j(max) =150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. single pulse width limited by junction temperatu re t j(max) =150 c. d. the r q ja is the sum of the thermal impedance from junction t o case r q jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 m s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedance which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of t j(max) =150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in 2 fr-4 board with 2oz. copper, in a still air environ ment with t a =25 c. rev.1.0: october 2015 www.aosmd.com page 2 of 6
AON7230 typical electrical and thermal characteristics 0 20 40 60 80 1 2 3 4 5 i d (a) v gs (volts) figure 2: transfer characteristics (note e) 4 6 8 10 12 14 16 0 5 10 15 20 25 30 r ds(on) (m w ) i d (a) figure 3: on - resistance vs. drain current and gate 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on - resistance vs. junction temperature v gs =4.5v i d =11a v gs =10v i d =13a 25 c 125 c v ds =5v v gs =4.5v v gs =10v 0 20 40 60 80 0 1 2 3 4 5 i d (a) v ds (volts) figure 1: on-region characteristics (note e) v gs =3v 3.5v 4.5v 10v 4v d figure 3: on - resistance vs. drain current and gate voltage (note e) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 25 c 125 c figure 4: on - resistance vs. junction temperature (note e) 0 5 10 15 20 25 30 2 4 6 8 10 r ds(on) (m w ) v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =13a 25 c 125 c rev.1.0: october 2015 www.aosmd.com page 3 of 6
AON7230 typical electrical and thermal characteristics 0 100 200 300 400 500 0.0001 0.001 0.01 0.1 1 10 100 power (w) pulse width (s) figure 10: single pulse power rating junction - to - 0 2 4 6 8 10 0 5 10 15 20 25 30 35 v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 500 1000 1500 2000 2500 3000 0 20 40 60 80 100 capacitance (pf) v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =50v i d =13a t j(max) =150 c t c =25 c 10 m s 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 1000 i d (amps) v ds (volts) v > or equal to 4.5v 10 m s 1ms dc r ds(on) limited t j(max) =150 c t c =25 c 100 m s 10ms figure 10: single pulse power rating junction - to - case (note f) 0.01 0.1 1 10 1e-05 0.0001 0.001 0.01 0.1 1 10 100 z q jc normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t c +p dm .z q jc .r q jc t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse v gs > or equal to 4.5v figure 9: maximum forward biased safe operating area (note f) r q jc =2.3 c/w rev.1.0: october 2015 www.aosmd.com page 4 of 6
AON7230 typical electrical and thermal characteristics 0 10 20 30 40 50 60 0 25 50 75 100 125 150 power dissipation (w) t case ( c) figure 12: power de-rating (note f) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 current rating i d (a) t case ( c) figure 13: current de-rating (note f) 1 10 100 1000 10000 1e-05 0.001 0.1 10 1000 power (w) pulse width (s) t a =25 c 0.001 0.01 0.1 1 10 0.0001 0.001 0.01 0.1 1 10 100 1000 z q ja normalized transient thermal resistance pulse width (s) figure 15: normalized maximum transient thermal imp edance (note h) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p dm in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse pulse width (s) figure 14: single pulse power rating junction-to-am bient (note h) r q ja =60 c/w rev.1.0: october 2015 www.aosmd.com page 5 of 6
AON7230 - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms t t r d(on) t on t d(off) t f t off l bv unclamped inductive switching (uis) test circuit & waveforms vds dss 2 e = 1/2 li ar ar figure a: gate charge test circuit & waveforms figure b: resistive switching test circuit & wavefor ms figure c: unclamped inductive switching (uis) test c ircuit & waveforms vdd vgs id vgs rg dut - + vdc vgs vds id vgs i ig vgs - + vdc dut l vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar di/dt i rm rr vdd vdd q = - idt t rr figure d: diode recovery test circuit & waveforms rev.1.0: october 2015 www.aosmd.com page 6 of 6


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